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PDF ( 数据手册 , 数据表 ) 93C46A

零件编号 93C46A
描述 1K Microwire Compatible Serial EEPROM
制造商 Microchip
LOGO Microchip LOGO 


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93C46A 数据手册, 描述, 功能
93AA46A/B/C, 93LC46A/B/C,
93C46A/B/C
1K Microwire Compatible Serial EEPROM
Device Selection Table
Part Number
93AA46A
93AA46B
93LC46A
93LC46B
93C46A
93C46B
93AA46C
93LC46C
93C46C
VCC Range
1.8-5.5
1.8-5-5
2.5-5.5
2.5-5.5
4.5-5.5
4.5-5.5
1.8-5.5
2.5-5.5
4.5-5.5
ORG Pin
No
No
No
No
No
No
Yes
Yes
Yes
Features:
• Low-Power CMOS Technology
• ORG Pin to Select Word Size for ‘46C’ Version
• 128 x 8-bit Organization ‘A’ Devices (no ORG)
• 64 x 16-bit Organization ‘B’ Devices (no ORG)
• Self-Timed Erase/Write Cycles (including
Auto-Erase)
• Automatic Erase All (ERAL) Before Write All
(WRAL)
• Power-On/Off Data Protection Circuitry
• Industry Standard 3-Wire Serial I/O
• Device Status Signal (Ready/Busy)
• Sequential Read Function
• 1,000,000 Erase/Write Cycles
• Data Retention > 200 Years
• Pb-free and RoHS Compliant
• Temperature Ranges Supported:
- Industrial (I) -40°C to +85°C
- Automotive (E) -40°C to +125°C
Word Size Temp Ranges
Packages
8-bit
16-bit
8-bit
16-bit
8-bit
16-bit
8- or 16-bit
8- or 16-bit
8- or 16-bit
I P, SN, ST, MS, OT, MC, MN
I P, SN, ST, MS, OT, MC, MN
I, E P, SN, ST, MS, OT, MC, MN
I, E P, SN, ST, MS, OT, MC, MN
I, E P, SN, ST, MS, OT, MC, MN
I, E P, SN, ST, MS, OT, MC, MN
I P, SN, ST, MS, MC, MN
I, E P, SN, ST, MS, MC, MN
I, E P, SN, ST, MS, MC, MN
Pin Function Table
Name
Function
CS
CLK
DI
DO
VSS
NC
ORG
VCC
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
No internal connection
Memory Configuration
Power Supply
Description:
The Microchip Technology Inc. 93XX46A/B/C devices
are 1Kbit low-voltage serial Electrically Erasable
PROMs (EEPROM). Word-selectable devices such as
the 93AA46C, 93LC46C or 93C46C are dependent
upon external logic levels driving the ORG pin to set
word size. For dedicated 8-bit communication, the
93AA46A, 93LC46A or 93C46A devices are available,
while the 93AA46B, 93LC46B and 93C46B devices
provide dedicated 16-bit communication. Advanced
CMOS technology makes these devices ideal for low-
power, nonvolatile memory applications. The entire
93XX Series is available in standard packages includ-
ing 8-lead PDIP and SOIC, and advanced packaging
including 8-lead MSOP, 6-lead SOT-23, 8-lead
2x3 DFN/TDFN and 8-lead TSSOP. All packages are
Pb-free (Matte Tin) finish.
2002-2011 Microchip Technology Inc.
DS21749J-page 1







93C46A pdf, 数据表
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
2.5 Erase All (ERAL)
The Erase All (ERAL) instruction will erase the entire
memory array to the logical ‘1’ state. The ERAL cycle
is identical to the erase cycle, except for the different
opcode. The ERAL cycle is completely self-timed and
commences at the falling edge of the CS, except on
‘93C’ devices where the rising edge of CLK before the
last data bit initiates the write cycle. Clocking of the
CLK pin is not necessary after the device has entered
the ERAL cycle.
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low (TCSL).
Note:
After the ERAL command is complete,
issuing a Start bit and then taking CS low
will clear the Ready/Busy status from DO.
VCC must be 4.5V for proper operation of ERAL.
FIGURE 2-3:
CS
ERAL TIMING FOR 93AA AND 93LC DEVICES
TCSL
Check Status
CLK
DI
1
00
10
x •••
x
DO High-Z
VCC must be 4.5V for proper operation of ERAL.
FIGURE 2-4:
ERAL TIMING FOR 93C DEVICES
CS
TCSL
TSV
Busy
TEC
TCZ
Ready
High-Z
Check Status
CLK
DI
1
00
10
x •••
x
DO High-Z
TSV
Busy
TEC
TCZ
Ready
High-Z
DS21749J-page 8
2002-2011 Microchip Technology Inc.







93C46A equivalent, schematic
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21749J-page 16
2002-2011 Microchip Technology Inc.










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