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PDF ( 数据手册 , 数据表 ) IS43DR16640C

零件编号 IS43DR16640C
描述 DDR2 DRAM
制造商 ISSI
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IS43DR16640C 数据手册, 描述, 功能
IS43/46DR81280C
IS43/46DR16640C
128Mx8, 64Mx16 DDR2 DRAM
FEATURES
Vdd = 1.8V ±0.1V, Vddq = 1.8V ±0.1V
JEDEC standard 1.8V I/O (SSTL_18-compatible)
Double data rate interface: two data transfers
per clock cycle
Differential data strobe (DQS, DQS)
4-bit prefetch architecture
On chip DLL to align DQ and DQS transitions
with CK
8 internal banks for concurrent operation
Programmable CAS latency (CL) 3, 4, 5, 6 and 7
supported
Posted CAS and programmable additive latency
(AL) 0, 1, 2, 3, 4, 5 and 6 supported
WRITE latency = READ latency - 1 tCK
Programmable burst lengths: 4 or 8
Adjustable data-output drive strength, full and
reduced strength options
On-die termination (ODT)
ADVANCED INFORMATION
DESCRIPTION
MAY 2013
ISSI's 1Gb DDR2 SDRAM uses a double-data-rate
architecture to achieve high-speed operation. The
double-data rate architecture is essentially a 4n-prefetch
architecture, with an interface designed to transfer two
data words per clock cycle at the I/O balls.
ADDRESS TABLE
Parameter
Configuration
Refresh Count
128M x 8
16M x 8 x 8
banks
8K/64ms
64M x 16
8M x 16 x 8
banks
8K/64ms
Row Addressing 16K (A0-A13) 8K (A0-A12)
Column
Addressing
1K (A0-A9)
Bank Addressing BA0 - BA2
1K (A0-A9)
BA0 - BA2
Precharge
Addressing
A10
A10
OPTIONS
Configuration(s):
128Mx8 (16Mx8x8 banks): IS43/46DR81280C
64Mx16 (8Mx16x8 banks): IS43/46DR16640C
Package:
x8: 60-ball BGA (8mm x 10.5mm)
x16: 84-ball WBGA (8mm x 12.5mm)
Timing – Cycle time
2.5ns @CL=5 DDR2-800D
2.5ns @CL=6 DDR2-800E
3.0ns @CL=5 DDR2-667D
3.75ns @CL=4 DDR2-533C
5ns @CL=3 DDR2-400B
Temperature Range:
Commercial (0°C Tc 85°C)
Industrial (-40°C Tc 95°C; -40°C Ta 85°C)
Automotive, A1 (-40°C Tc 95°C; -40°C Ta 85°C)
Automotive, A2 (-40°C Tc; Ta 105°C)
Tc = Case Temp, Ta = Ambient Temp
KEY TIMING PARAMETERS
Speed Grade -25D -3D
tRCD
12.5 15
tRP 12.5 15
tRC 55 55
tRAS
40 40
tCK @CL=3
55
tCK @CL=4
3.75 3.75
tCK @CL=5
2.5 3
tCK @CL=6
2.5 —
Copyright © 2013 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest
version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com 1
Rev. 00A
6/4/2013







IS43DR16640C pdf, 数据表
IS43/46DR81280C, IS43/46DR16640C
Operating Temperature Condition
Symbol Parameter
Rating(1,2,3)
TOPER Commercial Temperature
Tc = 0 to +85
Industrial Temperature,
Tc = -40 to +95
Automotive Temperature (A1)
Ta = -40 to +85
Automotive Temperature (A2)
Tc = -40 to +105
Ta = -40 to +105
Notes:
1. Tc = Operating case temperature at center of package
2. Ta = Operating ambient temperature immediately above package center.
3. Both temperature specifications must be met.
Units
oC
oC
oC
oC
oC
Thermal Resistance:
Package
60-ball BGA
84-ball BGA
Substrate
4-layer
4-layer
Theta-ja
(Airflow = 0m/s)
35.8
33.9
Theta-ja
(Airflow = 1m/s)
32.0
30.3
Theta-ja
(Airflow = 2m/s)
29.8
28.3
Theta-jc
5.9
5.7
Units
C/W
C/W
ODT DC Electrical Characteristics
PARAMETER/CONDITION
Rtt effective impedance value for EMR(1)[A6,A2]=0,1; 75 Ω
Rtt effective impedance value for EMR(1)[A6,A2]=1,0; 150 Ω
Rtt effective impedance value for EMR(1)[A6,A2]=1,1; 50 Ω
Deviation of VM with respect to VDDQ/2
Notes:
1. Test condition for Rtt measurements
SYMBOL
Rtt1(eff)
Rtt2(eff)
Rtt3(eff)
ΔVM
MIN
60
120
40
-6
NOM
75
150
50
MAX
90
180
60
+6
UNITS
Ω
Ω
Ω
%
NOTES
1
1
1
1
Measurement Definition for Rtt(eff): Apply VIH (ac) and VIL (ac) to test pin separately, then measure current I(VIH (ac)) and I( VIL
(ac)) respectively. VIH (ac), VIL (ac), and VDDQ values defined in SSTL_18
Rtt (eff) Vih (ac) - Vil (ac)
I(Vih (ac)) - I(Vil (ac))
Measurement Definition for VM: Measure voltage (VM) at test pin (midpoint) with no load.
ΔVM = [(2 x VM / VDDQ) - 1] x 100%
8 Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00A
6/4/2013







IS43DR16640C equivalent, schematic
IS43/46DR81280C, IS43/46DR16640C
Electrical Characteristics & AC Timing Specifications
Refresh parameters (TOPER; VDDQ = 1.8 V +/- 0.1 V; VDD = 1.8 V +/- 0.1 V)
Parameter
Symbol
Refresh to active/Refresh command time tRFC
127.5
Average periodic refresh interval
tREFI
-40oC Tc < 0oC
0oC Tc 85oC
85oC < Tc 95oC
95oC < Tc 105oC
7.8
7.8
3.9
3.9
Units
ns
ms
ms
ms
ms
Notes
1
1,2
1
1,2
1,2,3
Notes:
1. If refresh timing is violated, data corruption may occur and the data must be re-written with valid data before a valid READ can be executed.
2. Specified for Industrial and Automotive grade only; not applicable for Commercial grade. Toper may not be violated.
3. Specified for Automotive grade (A2) only; not applicable for any other grade. Toper may not be violated.
Key Timing Parameters by Speed Grade
-25D
-25E
Speed bin (JEDEC) DDR2-800D DDR2-800E
CL-tRCD-tRP
5-5-5
6-6-6
tRCD
12.5 15
tRP 12.5 15
tRC 55 55
tRAS
40 40
tCK(avg)@CL=3
5
5
tCK(avg)@CL=4
3.75
3.75
tCK(avg)@CL=5
2.5
3
tCK(avg)@CL=6
2.5
2.5
-3D
DDR2-667D
5-5-5
15
15
55
40
5
3.75
3
-37C
DDR2-533C
4-4-4
15
15
55
40
5
3.75
-5B
DDR2-400B
3-3-3
15
15
55
40
5
5
Note:
Each of the -25D and -3D speed options is individually backward compatible with all the timing specifications for slower options (ie. -25D
complies with specifications for -25D, -25E, -3D, -37C, -5B). -25E, -37C, and -5B shown for reference only.
16 Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00A
6/4/2013










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