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PDF ( 数据手册 , 数据表 ) NLHV18T3244

零件编号 NLHV18T3244
描述 18-Channel Level Shifter
制造商 ON Semiconductor
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NLHV18T3244 数据手册, 描述, 功能
NLHV18T3244
18-Channel Level Shifter
The NLHV18T3244 is an 18channel level translator designed for
high voltage level shifting applications such as displays. The 18
channels are divided into twelve and two three channel groups, with
each group controlled by the inverting inputs SEL1, SEL2 and, SEL3;
respectively. The EN input is used to select the ‘ON’ or power saving
shutdown modes.
Each channel consists of a high voltage output buffer. The output
buffers use Nchannel low side and Pchannel high side transistors.
The output signal on pins OUT1 to OUT18 is pulled by the transistors
to the positive high or negative low voltage on the VHx and VLx power
supply pins, respectively, depending on the voltage of the inverting
pins.
Features
18 NonInverting / Inverting Channels
VH1, VH2 Supply Range: 5 V to 25 V
VL1, VL2 Supply Range: 13 V to 0 V
VHx – VLx Difference Range: 5 V to 25 V
VL1 and VL2 can be tied together or connected to independent supply
voltages as long as VL1 VL2
VD Supply Range: 2 V to 5.5 V
Outputs Specified with 1000 pF Capacitive Loads
Disable Function
Low Standby Current
No Glitch on PowerUp
Available in: 5 mm x 10 mm, 0.5 mm pitch, QFN50 Package
Typical Applications
OLED Drivers
High Voltage Level Shifters
Piezoelectric Motor Drivers
http://onsemi.com
MARKING
DIAGRAM
1 50
QFN50
CASE 485BW
NLHV
18T3244
AWLYYWWG
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = PbFree Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
May, 2013 Rev. 0
1
Publication Order Number:
NLHV18T3244/D







NLHV18T3244 pdf, 数据表
NLHV18T3244
APPLICATIONS INFORMATION
PowerUp Sequence
The recommended powerup sequence of the power
supplies is provided in Figure 3.
VH2 = 17 V
VH1 = 15 V
VD
VL2 = 0 V
200 ms
20 ms 20 ms
VL1 = -5 V
Figure 3. PowerUp Sequence
Power Supply Guidelines
Supply voltage VL1 must be less than or equal to voltage
VL2. The substrate is connected to VL1; thus, VL1 must be
the at lowest voltage potential to ensure proper biasing of the
internal level shifting circuits. In addition, setting VL1 to the
lowest voltage ensures proper operation of the overvoltage
and ESD protection circuits connected on the supply voltage
and input/output lines, respectively.
For optimal performance, 0.1 and 1 mF decoupling
capacitors are recommended for the VD, VL1, VL2, VH1, and
VH2 power supply pins. High frequency ceramic or tantalum
capacitors are good design choices to filter and bypass any
noise signals on the supply voltage lines to the ground plane
of the PCB. The noise immunity will be maximized by
placing the capacitors as close as possible to the supply and
ground pins, along with minimizing the PCB connection
traces. In addition, a ferrite bead can be placed between the
two decoupling capacitors to form a bi-directional LC Tee
filter if additional noise immunity is required.
http://onsemi.com
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