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PDF ( 数据手册 , 数据表 ) 74HC131

零件编号 74HC131
描述 3-to-8-line Decoder/Demultiplexer
制造商 Hitachi Semiconductor
LOGO Hitachi Semiconductor LOGO 


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74HC131 数据手册, 描述, 功能
HD74HC131
3-to-8-line Decoder/Demultiplexer with Edge-Triggered
Address Registers
Description
The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A,B,C) and D type register.
Address select data store to D type registers, during the positive going transition of the clock pulse.
Output control (G 1, G2) are independent of select input and CLK input, and when G1 is low or G2 = High,
all outputs is high.
Features
High Speed Operation: tpd (CLK to Y) = 20 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 V to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)







74HC131 pdf, 数据表
9.9
10.3 Max
16
9
1
1.27
8
0.635 Max
*0.42 ± 0.08
0.40 ± 0.06
0.15
0.25 M
*Dimension including the plating thickness
Base material dimension
Unit: mm
6.10
+
0.10
0.30
1.08
0.60
+
0.67
0.20
0° – 8°
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
FP-16DN
Conforms
Conforms
0.15 g














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