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PDF 74LS51 ( 数据表 ) |
零件编号 | 功能 ( 描述 ) | 制造商 | ||
2 | 74LS51 | Dual 2-Wide 2-Input/ 2-Wide 3-Input AND-OR-INVERT Gate DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gate August 1986 Revised March 2000 DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gate General Description This devi |
Fairchild Semiconductor |
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1 | 74LS51 | 2-wide 2-input/ 2-wide 3-input AND-OR-INVERT Gates Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0.10 Hitachi Code JEDEC EIAJ Wei |
Hitachi Semiconductor |
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