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PDF 74LS48 ( 数据表 ) |
零件编号 | 功能 ( 描述 ) | 制造商 | ||
4 | 74LS48 | BCD-to-Seven-Segment Decoder Driver(Internal Pull-up outputs) Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0.10 Hitachi Code JEDEC EIAJ Wei |
Hitachi Semiconductor |
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3 | 74LS48 | BCD TO 7-SEGMENT DECODER SN54/74LS48 BCD TO 7-SEGMENT DECODER The SN54 / 74LS48 is a BCD to 7-Segment Decoder consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. Seven NAND gates and one driver ar |
Motorola Semiconductors |
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2 | 74LS48 | BCD to 7-Segment Decoder DM74LS48 BCD to 7-Segment Decoder January 1992 DM74LS48 BCD to 7-Segment Decoder General Description The ’LS48 translates four lines of BCD (8421) input data into the 7-segment numeral c |
National Semiconductor |
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1 | 74LS48 | BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS |
Texas Instruments |
零件编号 | 功能 ( 描述 ) | 制造商 | |
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Micross |
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ROHM |
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Microchip |
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